Seminar series
Date
Thu, 07 Mar 2019
17:00
Location
L5
Speaker
Rahul Santhanam
Organisation
Oxford

The well known (and notoriously hard) P vs NP problem asks whether every Boolean function with polynomial-size proofs is also computable in
polynomial time.

The standard approach to the P vs NP problem is via circuit complexity. For progressively richer classes of Boolean circuits (networks of AND, OR and NOT
logic gates), one wishes to show super-polynomial lower bounds on the sizes of circuits (as a function of the size of the input) computing some Boolean
function known to be in NP, such as the Satisfiability problem.

However, there is a more logic-oriented approach initiated by Cook and Reckhow, going through proof complexity rather than circuit complexity. For
progressively richer proof systems, one wishes to show super-polynomial lower bounds on the sizes of proofs (as a function of the size of the tautology) of
some sequence of propositional tautologies.

I will give a brief overview on known results along these two directions, and on their limitations. Somewhat surprisingly, similar techniques have been found
to be useful for these seemingly different approaches. I will say something about known connections between the approaches, and pose the question of
whether there are deeper connections.

Finally, I will discuss how the perspective of proof complexity can be used to formalize the difficulty of proving lower bounds on the sizes of computations
(or of proofs).

 

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